Architecture and Design Team to enhance capabilities on Front End Design and Architecture front.

What you'll need:

• SoC Front End Lead with 12+ years of experience
• Micro-Architecture, RTL Design, Verification, RTL Quality checks, Synthesis, Constraints build, Timing closure.
• Verilog, System Verilog RTL Coding,Verification, debug using Xcelium and VCS simulators.
• Managing hands-on multiple partitions and Top level.
• Experience working with DFT, Physical Design teams in closing the design.
• Constraint building, Timing Closure with Physical Design Team.